1. Field of the Invention
The present invention relates to a semiconductor device and, in particular, to a bump structure of the semiconductor device.
2. Description of the Related Art
In semiconductor devices mounted on wiring substrates by flip chip bonding, a protruding electrode called a bump is formed on an electrode on the surface of the semiconductor device.
Japanese Patent Laid-Open No. H6-177134 discloses a technique for reducing the heat stress generated in the bump by the heat cycle at mounting. A resin layer, such as a polyimide layer, is formed between a terminal electrode on the wafer and a barrier metal layer which covers the terminal electrode. Deformation of the resin layer reduces the thermal stress.
Japanese Patent Laid-Open No. 2000-183089 relates to a bump structure of a semiconductor device and discloses a technique for constructing an insulation layer with two polyimide layers which covers a surface of the semiconductor device. By constructing the insulation layer with the two polyimide layers, the insulation layer can be made thick, and columnar terminals formed in opening portions of the insulation layer can be lengthened.
Japanese Patent Laid-Open No. 2002-110799 also discloses a bump structure of a semiconductor device.